In recent years, there have been semiconductor integrated circuits that operate at higher speeds and lower voltages, thanks to progress and development of miniaturization techniques. However, the resistance to exogenous noise that enters from outside via a power supply line, or the noise immunity, is becoming lower and lower.
Therefore, to consider and take measures to improve the noise immunity, it is essential that the influence of exogenous noise on operations of semiconductor integrated circuits is analyzed, and the mechanism of the influence is made clear.
There have been two known methods for analyzing operations of semiconductor integrated circuits. According to one of the methods, noise is applied to a completed actual device from outside by a certain technique, and the cause of a false operation is analyzed by observing the operation of the device from outside. According to the other one of the methods, the inside of a subject semiconductor integrated circuit is modeled on a so-called “LRC network”, which is expressed by inductances L, resistances R, and capacitances C, based on design information used for manufacture. A noise source is inserted to the LRC network, and an analysis is made through a simulation.
Hereinafter, the first method will be referred to as an “analysis technique through actual measurement,” and the second method will be referred to as an “analysis technique through a simulation.” As a technique related to analyses of operations of semiconductor integrated circuits with the influence of exogenous noise taken into consideration, a noise immunity evaluating device is disclosed as an “analysis technique through actual measurement” in Patent Document 1. Meanwhile, an electromagnetic wave interference analyzing apparatus is disclosed as an “analysis technique through a simulation” in Patent Document 2.
The noise immunity evaluating device disclosed in Patent Document 1 actually measures an operation of a semiconductor integrated circuit by applying a square wave as noise to an arbitrary location on a board. On the other hand, the electromagnetic wave interference analyzing apparatus disclosed in Patent Document 2 models a power supply interconnect inside a semiconductor integrated circuit and a power supply interconnect outside the semiconductor integrated circuit on an equivalent circuit, and performs a simulation by supplying a noise waveform to the equivalent circuit. In this manner, the electromagnetic wave interference analyzing apparatus analyzes the influence of noise on the semiconductor integrated circuit.